Bitget: AMD plans mass production of next‑gen EPYC at TSMC’s Arizona wafer plant

AMD’s own announcement is firmer than the Bitget framing. On May 21, AMD said its next-generation EPYC server processor, codenamed Venice, is ramping production in Taiwan on TSMC’s 2-nanometer process, “with future plans to ramp production at TSMC’s Arizona fabrication facility.” (amd.com) That matters because the Bitget item is not the only source for the Arizona claim. The underlying point — that AMD intends future EPYC production in Arizona — appears in AMD’s press release and in republished versions of that release, even though AMD did not give a date, output level or product split for Arizona. (amd.com 1) (amd.com 2) ### So did AMD actually say Arizona will make next-gen EPYC chips? AMD did, but in narrower terms than the headline suggests. The company said Venice is currently ramping in Taiwan and that there are “future plans” to ramp production in Arizona. That is not the same as saying Arizona mass production has begun, or that all next-generation EPYC output will move there. (amd.com) The product in question is Venice, which AMD described as its next-generation EPYC processor and its 6th Gen EPYC CPU. AMD also said Venice is the first high-performance computing product in the industry to reach production ramp on TSMC’s advanced 2nm technology. (amd.com) ### Why are people treating the Bitget report cautiously? Bitget’s article points to a real AMD statement, but the caution comes from what AMD did not disclose. AMD did not publish a start date for Arizona volume manufacturing, did not say which Arizona fab would handle the work, and did not provide expected wafer volumes or customer shipments from the site. (amd.com) Reuters-style caution is also warranted because semiconductor “ramp,” “validation,” and “mass production” are not interchangeable. In April 2025, AMD said it had successfully brought up and validated 5th Gen EPYC products at TSMC’s Arizona facility, which showed the site could run AMD silicon, but that was a different milestone from a production ramp. (amd.com) ### What has AMD previously said about Arizona? AMD had already tied Arizona to its server CPU roadmap before this week. In April 2025, the company said 5th Gen EPYC products had been brought up and validated at TSMC’s Arizona fab, and CEO Lisa Su said that step underscored AMD’s commitment to U.S. manufacturing. (amd.com) Lisa Su also linked Venice to that roadmap. AMD said in the 2025 announcement that Venice was on track to launch the following year, and this week’s update moved that story forward by saying the chip is now in production ramp on TSMC’s 2nm process. ### What does this say about TSMC’s Arizona site? (amd.com) TSMC has been building Arizona into a much larger U.S. manufacturing base. The company says its Phoenix plans now include six wafer fabs, two advanced packaging facilities and an R&D team center, with total planned U.S. investment of $165 billion. For AMD, that means Arizona is no longer only a test or political talking point in public statements. (amd.com) The company is now explicitly naming the site as a future production location for a flagship server CPU family, even if the operational details remain undisclosed. That last point is an inference from AMD’s wording and TSMC’s disclosed Arizona buildout. ### What still is not confirmed? AMD has not publicly said when Arizona production will start, whether it will match Taiwan yields or costs, or how much Venice output will be allocated there. A separate report summarized by search results said Lisa Su described Arizona production as progressing well, but the clearest primary-source wording remains AMD’s own May 21 release. (tsmc.com) The next concrete milestone is Venice’s expected 2027 launch, which AMD cited in its earlier roadmap update, alongside any future AMD or TSMC disclosure about Arizona production timing and capacity. (amd.com) (amd.com)