TSMC announces accelerated 3nm ramp, targeting roughly 180,000 wafers/month
- TSMC is now expected to push its Taiwan 3nm output to about 180,000 wafers a month by late 2026, faster than earlier plans. - That is roughly 20% above the prior 150,000-wafer target and more than 40% above the 120,000 to 130,000 monthly run rate at end-2025. - It matters because AI chip demand is forcing TSMC to keep expanding a node that normally would have stopped scaling. (trendforce.com)
TSMC’s 3nm ramp matters because 3nm is where a lot of the AI chip world still lives. Not just phone chips anymore — GPUs, CPUs, networking silicon, and now more accelerator parts are all competing for the same leading-edge wafers. The new wrinkle is that TSMC is now expected to take monthly 3nm capacity to roughly 180,000 wafers by the end of 2026, up from an earlier 150,000 target. That is a big enough change to alter who gets supply first, and how long the bottleneck lasts. (trendforce.com) ### Why is 3nm still such a big deal? Because “3nm” is really a family of TSMC processes that sit in the sweet spot between bleeding-edge performance and manufacturable volume. TSMC moved the original N3 into high-volume production in 2022, then added N3E and N3P, with more variants for HPC, automotive, and lower-cost designs. So when people say “3nm demand,” they are talking about a whole stack of premium chips, not one niche node. ### What actually changed? The expected endpoint changed. (trendforce.com) Supply-chain reporting now points to TSMC’s Taiwan 3nm fabs reaching about 180,000 wafers per month by late 2026, versus an earlier expectation of 150,000. The same reporting says output was around 120,000 to 130,000 wafers per month at the end of 2025, so this is not a tweak — it is a materially faster ramp. ### Why is that unusual for TSMC? (tsmc.com) Because TSMC usually does not keep stuffing more capacity into a node once that node has hit its planned scale. This time, demand is strong enough that the company is still expanding 3nm anyway. That is the tell. It says the node is not just healthy — it is overloaded, and overloaded by customers willing to pay for leading-edge output right now. ### Who is pulling on that capacity? (trendforce.com) AI is the center of gravity. TrendForce’s writeup points to demand from NVIDIA and AMD GPUs, plus CPUs and other AI-related silicon, and says Intel and automotive customers are also consuming 3nm family capacity. The important point is not the exact customer mix. It is that 3nm is no longer mostly a smartphone story. AI infrastructure is now eating a huge share of the node. ### Does this fix the shortage? Not really. It helps, but it does not magically clear the line. If you move from roughly 120,000 to 130,000 wafers a month at end-2025 toward 180,000 by end-2026, that is more than 40% growth in a year. Big number. But big demand is meeting it at the same time, especially from AI accelerators and HPC parts that need the best performance-per-watt they can get. ### What about 2nm? (trendforce.com) 2nm is ramping too, and fast. TSMC says N2 started volume production in the fourth quarter of 2025, and outside reporting now expects monthly 2nm capacity to approach 100,000 wafers by the end of 2026. But 2nm does not instantly replace 3nm. Designs take time to migrate, yields have to mature, and many products will stay on 3nm variants because the economics still work. ### So what is the real takeaway? Basically, the bottleneck moved from “can TSMC build 3nm at scale?” to “can TSMC build enough 3nm for everybody who wants in?” The answer looks like yes, but only by breaking its usual pattern and pushing the node harder than expected. (trendforce.com) That is good news for customers like NVIDIA, AMD, and other AI chip designers. But it is also a sign that leading-edge supply is still tight enough to shape product timing, pricing, and who gets priority through 2026 and likely beyond. (tsmc.com)